The present invention relates to computer systems and more particularly to an input-output buffer for driving signals on a node of an integrated circuit.
Computer systems, from small handheld electronic devices to medium-sized mobile and desktop systems to large servers and workstations, are becoming increasingly pervasive in our society. A typical computer system includes two or more integrated circuits (ICs) affixed to a printed circuit board (PCB). The ICs communicate with one another by sending signals across transmission lines formed on the PCB. For example, one IC may be a processor while one or more other ICs are memory devices that the processor accesses to store and retrieve data. Increasing the speed, or frequency, at which signals are sent across these transmission lines tends to increase the computational power of the computer. Unfortunately, there are electrical properties that limit the signal frequency.
Inductance, resistance, and capacitance on the transmission lines not only limit the frequency but also introduce noise into the signals. Noise may be compensated for by allowing more time for each bit of the signal to settle on the transmission line before the next bit is sent, thereby further reducing signal frequency.
In an effort to overcome some of these limitations, most ICs include input-output (I-O) buffers. An I-O buffer conditions a signal driven to and received from another IC. A typical I-O buffer conditions an output signal generated by the IC by boosting the signal""s voltage or current levels before driving the signal on the transmission line. This boosted signal may then be transferred to another IC via the transmission line more cleanly. The I-O buffer may condition an input signal received from another IC via the transmission line by adjusting the signal""s voltage or current levels before providing the signal to other circuitry within the IC. The I-O buffer may additionally provide electrostatic discharge protection for the IC.
An I-O buffer for an integrated circuit and a method for operating the buffer are described. In accordance with one embodiment of the present invention, a buffer for an I-O node includes a controller and first and second groups of transistors to pull the node up and down, respectively. The controller is configured to turn on a transistor from the first group to drive a high bit on the node during a first period of time. The controller is further configured to turn on transistors from both the first and second groups, simultaneously, to terminate the node during a second period of time.
In accordance with another embodiment of the present invention, the controller is configured to turn on a transistor from the second group to drive a low bit on the node during a third period of time.
Other features and advantages of the present invention will be apparent from the accompanying drawings and the detailed description that follows.